Write-around cache simulator. Writes bypass the cache entirely; only reads populate it.
Writes bypassed
0
Cache protected
0
Read hits
0
Read misses
0
write bypasses cache
CPU
core
reads only
Cache
read-only · stays clean
load on read miss
Memory
authoritative
Address
Value
Write
Read
Demo
Reset
ready · writes curve around the cache to memory; reads populate the cache